MARC details
| 000 -LEADER |
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| fixed length control field |
04367nam a22001697a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20211227104520.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
211227b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9781402062537 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
629.895 |
| Item number |
RAM |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Ramesh, S. |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Next generation design and verification methodologies for distributed embedded control systems : |
| Remainder of title |
proceedings of the GM R & D Workshop, Bangalore, India, January 2007 |
| Statement of responsibility, etc. |
S Ramesh; Prahladavaradan Sampath |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Dordrecht : |
| Name of publisher, distributor, etc. |
Springer, |
| Date of publication, distribution, etc. |
2007. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Page number |
300 pages |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Title |
An Abstraction Technique for Real-Time Verification --<br/> |
| -- |
SCADE: Synchronous Design and Validation of Embedded Control Software --<br/> |
| -- |
Model-Based Development of Embedded Systems: The SysWeaver Approach --<br/>. |
| -- |
Verification and Integration of Real-Time Control Software --<br/> |
| -- |
Merge Algorithms for Intelligent Vehicles --<br/> |
| -- |
All Those Duration Calculi: An Integrated Approach --<br/> |
| -- |
Adding Time to Scenarios --<br/> |
| -- |
Using System-Level Timing Analysis for the Evaluation and Synthesis of Automotive Architectures --<br/> |
| -- |
Verifiable Design of Asynchronous Software --<br/> |
| -- |
Approximate Symbolic Reachability of Networks of Transition Systems --<br/> |
| -- |
Schedule Verification and Synthesis for Embedded Real-Time Components --<br/> |
| -- |
An Instrumentation-Based Approach to Controller Validation --<br/> |
| -- |
A Design Methodology for Distributed Real-Time Automotive Applications --<br/> |
| -- |
Role of Formal Methods in the Automobile Industry --<br/> |
| -- |
Predicting Failures of and Repairing Inductive Proof Attempts --<br/> |
| -- |
Can Semi-Formal be Made More Formal? --<br/> |
| -- |
Beyond Satisfiability: Extensions and Applications --<br/> |
| -- |
Compositional Reactive Semantics of SystemC and Verification with RuleBase --<br/> |
| -- |
PSL: Beyond Hardware Verification --<br/> |
| -- |
On the Polychronous Approach to Embedded Software Design --<br/> |
| -- |
Scaling up Model-checking --<br/> |
| -- |
Performance Debugging of Heterogeneous Real-Time Systems. An Abstraction Technique for Real-Time Verification --<br/> |
| -- |
SCADE: Synchronous Design and Validation of Embedded Control Software --<br/> |
| -- |
Model-Based Development of Embedded Systems: The SysWeaver Approach --<br/> |
| -- |
Verification and Integration of Real-Time Control Software --<br/> |
| -- |
Merge Algorithms for Intelligent Vehicles --<br/> |
| -- |
All Those Duration Calculi: An Integrated Approach --<br/> |
| -- |
Adding Time to Scenarios --<br/> |
| -- |
Using System-Level Timing Analysis for the Evaluation and Synthesis of Automotive Architectures --<br/> |
| -- |
Verifiable Design of Asynchronous Software --<br/> |
| -- |
Approximate Symbolic Reachability of Networks of Transition Systems --<br/> |
| -- |
Schedule Verification and Synthesis for Embedded Real-Time Components --<br/> |
| -- |
An Instrumentation-Based Approach to Controller Validation --<br/> |
| -- |
A Design Methodology for Distributed Real-Time Automotive Applications --<br/> |
| -- |
Role of Formal Methods in the Automobile Industry --<br/> |
| -- |
Predicting Failures of and Repairing Inductive Proof Attempts --<br/> |
| -- |
Can Semi-Formal be Made More Formal? --<br/> |
| -- |
Beyond Satisfiability: Extensions and Applications --<br/> |
| -- |
Compositional Reactive Semantics of SystemC and Verification with RuleBase --<br/> |
| -- |
PSL: Beyond Hardware Verification --<br/> |
| -- |
On the Polychronous Approach to Embedded Software Design --<br/> |
| -- |
Scaling up Model-checking --<br/> |
| -- |
Performance Debugging of Heterogeneous Real-Time Systems |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
This volume is the proceedings of the workshop "Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems" organised by General Motors R & D, India Science Lab. The workshop was held on January 5-6 2007 at the NIAS auditorium, IISc campus, Bangalore, India. This workshop is the first of its kind to be organised by an automotive major to bring together the leaders in the field of embedded systems development to present state-of-the-art work, and to discuss future strategies for addressing the increasing complexity of embedded control systems. The workshop consisted of invited talks given by leading experts and researchers from academic and industrial organizations. The workshop covered all areas of embedded systems development and in particular: Formal specification and verification of distributed, heterogeneous, embedded systems Formal semantics of modeling languages Model-based specification and testing Formal approach to component based development Software product line engineering Automatic code generation for distributed, embedded systems |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
Books |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
4693 |
