An FPGA bsed Digits Recognition using optimized least square channel estimation using Deep Learning (Record no. 2020)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00349nam a22001097a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20231211121828.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 231211b |||||||| |||| 00| 0 eng d |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621 |
| Item number | ANF |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | 119EC0015, 119EC0018, 119EC0022 |
| 245 ## - TITLE STATEMENT | |
| Title | An FPGA bsed Digits Recognition using optimized least square channel estimation using Deep Learning |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Theses and Dissertations |
No items available.