MARC details
| 000 -LEADER |
|---|
| fixed length control field |
09463nam a22001817a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20240613153348.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
240613b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9789390385515 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.381 |
| Item number |
TUM |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Tummala, Rao R. |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Fundamentals Of Device & Systems Packaging |
| Statement of responsibility, etc. |
Rao Tummala |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
2 |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Chennai: |
| Name of publisher, distributor, etc. |
McGraw Hill Education India, |
| Date of publication, distribution, etc. |
2020. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Page number |
xx, 828p |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Title |
1 Introduction to Device and Systems Packaging Technologies<br/>1.2 Anatomy of an Electronic Packaged System from a Packaging Point of View<br/>1.3 Devices and Moore’s Law<br/>1.4 Electronic Technology Waves: Microelectronics, RF/Wireless, Photonics, MEMS, and<br/>Quantum Devices<br/>1.5 Packaging and Moore’s Law for Packaging<br/>1.6 Electronic Systems Technologies Trends<br/>1.7 Future Outlook<br/>1.8 How the Book Is Organized<br/>1.9 Homework Problems<br/>1.10 Suggested Reading<br/>Part 1 Fundamentals of Packaging<br/><br/><br/>2 Fundamentals of Electrical Design for Signals, Power, and Electromagnetic<br/>Interference<br/>2.1 What Is Electrical Package Design and Why?<br/>2.2 Electrical Anatomy of a Package<br/>2.3 Signal Distribution<br/>2.4 Power Distribution<br/>2.5 Electromagnetic Interference<br/>2.6 Summary and Future Trends<br/>2.7 Homework Problems<br/>2.8 Suggested Reading<br/><br/><br/>3 Fundamentals of Thermal Technologies<br/>3.1 What Is Thermal Management and Why?<br/>3.2 Anatomy of a Thermal Package System<br/>3.3 Chip Level Thermal Technologies<br/>3.4 Module Level Thermal Technologies<br/>3.5 System Level Thermal Technologies<br/>3.6 Power and Cooling Technologies for Electric Vehicles<br/>3.7 Summary and Future Trends<br/>3.8 Homework Problems<br/>3.9 Suggested Reading<br/><br/><br/>4 Fundamentals of Thermo-Mechanical Reliability<br/>4.1 What Is Thermo-Mechanical Reliability?<br/>4.2 Anatomy of a Package with Failures and Failure Mechanisms<br/>4.3 Types of Thermo-Mechanical-Induced Failures and Design Guidelines for Reliability<br/>4.4 Summary and Future Trends<br/>4.5 Homework Problems<br/>4.6 Suggested Reading<br/><br/><br/>5 Fundamentals of Package Materials at Microscale and Nanoscale<br/>5.1 What Is the Role of Materials in Packaging?<br/>5.2 Anatomy of a Package with a Variety of Materials<br/>5.3 Package Materials, Processes, and Properties<br/>5.4 Summary and Future Trends<br/>5.5 Homework Problems<br/>5.6 Suggested Reading<br/><br/><br/>6 Fundamentals of Ceramic, Organic, Glass, and Silicon Package Substrates<br/>6.1 What Is a Package Substrate and Why?<br/>6.2 Anatomy of Three Package Substrates: Ceramics, Organic Laminates, and Silicon<br/>6.3 Package Substrate Technologies<br/>6.3.1 Historical Trends<br/>6.4 Thick-Film Substrates<br/>6.5 Thin-Film Substrates<br/>6.6 Ultra-Thin-Film Substrates with Semiconductor Packaging Processes<br/>6.7 Summary and Future Trends<br/>6.8 Homework Problems<br/>6.9 Suggested Reading<br/><br/><br/>7 Fundamentals of Passive Components and Integration with Active Devices<br/>7.1 What Are Passive Components and Why?<br/>7.2 Anatomy of Passive Components<br/>7.3 Passive Component Technologies<br/>7.4 Functional Modules with Passives and Actives<br/>7.5 Summary and Future Trends<br/>7.6 Homework Problems<br/>7.7 Suggested Reading<br/><br/><br/>8 Fundamentals of Chip-to-Package Interconnections and Assembly<br/>8.1 What Are Chip-to-Package Interconnections and Assembly and Why?<br/>8.2 Anatomy of an Interconnection and Assembly<br/>8.4 Interconnections and Assembly Technologies<br/>8.5 Future Trends in Interconnection and Assembly Technologies<br/>8.5.1 Extension of SLID<br/>8.6 Homework Problems<br/>8.7 Suggested Reading<br/>9 Fundamentals of Embedded and Fan-Out Packaging<br/>9.2 Anatomy of a Fan-Out Wafer-Level Package (FO-WLP)<br/>9.3 Fan-Out Wafer-Level Package Technologies<br/>9.4 Panel-Level Package (PLP)<br/>9.5 Summary and Future Trends<br/>9.6 Homework Problems<br/>9.7 Suggested Reading<br/><br/><br/>10 Fundamentals of 3D Packaging with and without TSV<br/>10.2 Anatomy of a 3D Package with TSV<br/>10.3 3D ICs with TSV Technologies<br/>10.4 Summary and Future Trends<br/>10.5 Homework Problems<br/>10.6 Suggested Reading<br/>10.7 Acknowledgment<br/><br/><br/>11 Fundamentals of RF and Millimeter-Wave Packaging<br/>11.2 Anatomy of an RF System<br/>11.3 RF Technologies and Applications<br/>11.4 What Is a Millimeter-Wave System?<br/>11.5 Anatomy of a Millimeter-Wave Package<br/>11.6 Millimeter-Wave Technologies and Applications<br/>11.7 Summary and Future Trends<br/>11.8 Homework Problems<br/>11.9 Suggested Reading<br/><br/><br/>12 Fundamentals of Optoelectronics Packaging<br/>12.1 What Is Optoelectronics?<br/>12.2 Anatomy of an Optoelectronics System<br/>12.3 Optoelectronic Technologies<br/>12.4 Optoelectronic Systems, Applications, and Markets<br/>12.5 Summary and Future Trends<br/>12.6 Homework Problems<br/>12.7 Suggested Reading<br/><br/><br/>13 Fundamentals of MEMS and Sensor Packaging<br/>13.1 What Are MEMS?13.1.1 Historical Evolution<br/>13.2 Anatomy of a MEMS Package<br/>13.3 MEMS and Sensor Device Fabrication Technologies<br/>13.4 MEMS Packaging Technologies<br/>13.5 Application of MEMS and Sensors<br/>13.6 Summary and Future Trends<br/>13.7 Homework Problems<br/>13.8 Suggested Reading<br/><br/><br/>14 Fundamentals of Package Encapsulation, Molding, and Sealing<br/>14.1 What Is Sealing and Encapsulation and Why?<br/>14.2 Anatomy of an Encapsulated and a Sealed Package<br/>14.3 Properties of Encapsulants<br/>14.4 Encapsulation Materials<br/>14.5 Encapsulation Processes<br/>14.6 Hermetic Sealing<br/>14.7 Summary and Future Trends<br/>14.8 Homework Problems<br/>14.9 Suggested Reading<br/><br/><br/>15 Fundamentals of Printed Wiring Boards<br/>15.1 What Is a Printed Wiring Board?<br/>15.2 Anatomy of a Printed Wiring Board<br/>15.3 Printed Wiring Board Technologies<br/>15.4 Summary and Future Trends<br/>15.5 Homework Problems<br/>15.6 Suggested Reading<br/><br/><br/>16 Fundamentals of Board Assembly<br/>16.1 What Is a Printed Circuit Board Assembly (PCBA) and Why?<br/>16.2 Anatomy of Printed Circuit Board Assembly<br/>16.3 PCBA Technologies<br/>16.4 Types of Printed CircuitBoard Assembly<br/>16.5 Types of Assembly Soldering Processes<br/>16.6 Summary and Future Trends<br/>16.7 Homework Problems<br/>16.8 Suggested Reading<br/>16.9 Acknowledgment<br/><br/><br/>Part 2 Applications of Packaging Technologies<br/>17 Applications of Packaging Technologies in Future Car Electronics<br/>17.1 What Are Future Car Electronics and Why?<br/>17.2 Anatomy of a Future Car<br/>17.3 Future Car Electronic Technologies<br/>17.4 Summary and Future Trends<br/>17.5 Homework Problems<br/>17.6 Suggested Reading<br/><br/><br/>18 Applications of Packaging Technologies in Bioelectronics<br/>18.1 What Are Bioelectronics?<br/>18.2 Packaging Technologies for Bioelectronic Systems<br/>18.3 Examples of Bioelectronic Implants<br/>18.4 Summary and Future Trends<br/>18.5 Homework Problems<br/>18.6 Suggested Reading<br/><br/><br/>19 Applications of Packaging Technologies in Communication Systems<br/>19.1 What Are Communication Systems and Why?<br/>19.2 Anatomy of Two Communication Systems: Wired and Wireless<br/>19.3 Communication System Technologies<br/>19.4 Summary and Future Trends<br/>19.5 Homework Problems<br/>19.6 Suggested Reading<br/><br/><br/>20 Applications of Packaging Technologies in Computing Systems<br/>20.1 What Is Computer Packaging?<br/>20.2 The Anatomy of a Computer Package<br/>20.3 Computer Packaging Technologies<br/>20.4 Thermal Technologies<br/>20.5 Summary and Future Trends<br/>20.6 Homework Problems<br/>20.7 Suggested Reading<br/>20.8 Acknowledgments<br/><br/><br/>21 Applications of Packaging Technologies in Flexible Electronics<br/>21.1 What Are Flexible Electronics and Why?<br/>21.2 Anatomy of a Flexible Electronic System<br/>21.4 Summary and Future Trends<br/>21.5 Homework Problems<br/>21.6 Suggested Reading<br/><br/><br/>22 Applications of Packaging Technologies in Smartphones<br/>22.1 What Are Smartphones?<br/>22.2 Anatomy of a Smartphone<br/>22.3 Smartphone Packaging Technologies<br/>22.4 Systems Packaging in Smartphones<br/>22.5 Summary and Future Trends<br/>22.6 Homework Problems<br/>22.7 Suggested Reading |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
This thoroughly revised book offers the latest, comprehensive fundamentals in device<br/>and systems packaging technologies and applications. Readers will get in-depth<br/>explanations of the 15 core packaging technologies that make up any electronic<br/>system, including electrical design for power, signal, and EMI; thermal design by<br/>conduction, convection, and radiation heat transfer; thermo-mechanical failures and<br/>reliability; advanced packaging materials at micro and nanoscales; ceramic, organic,<br/>glass, and silicon substrates. This resource also discusses passive components such as<br/>capacitors, inductors, and resistors and their proximity integration with actives;<br/>chip-to-package interconnections and assembly; wafer and panel embedding<br/>technologies; 3D packaging with and without TS; RF and millimeter-wave packaging;<br/>role of optoelectronics; mems and sensor packaging ;encapsulation, molding and<br/>sealing; and printed wiring board and its assembly to form end-product systems.<br/>Fundamentals of Device and Systems Packaging: Technologies and Applications,<br/>Second Edition introduces the concept of Moore’s Law for packaging, as Moore’s Law<br/>for ICs is coming to an end due to physical, material, electrical, and financial<br/>limitations. Moore’s Law for Packaging (MLP) can be viewed as interconnecting and<br/>integrating many smaller chips with high aggregate transistor density, at higher<br/>performance and lower cost than Moore’s Law for ICs. This book lays the groundwork<br/>for Moore’s Law for Packaging by showing how I/Os have evolved from one package<br/>family node to the next, starting with <16 I/Os in the 1960s with leadframe-plastic<br/>packages to the current silicon interposers with about 200,000 I/Os. It proposes a<br/>variety of ways to extend Moore’s Law, such as extending Si interposers and beyond<br/>using glass panel embedding. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
Books |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6605 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6606 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6607 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6608 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6609 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6637 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6638 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6639 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6640 |
| 952 ## - LOCATION AND ITEM INFORMATION (KOHA) |
|---|
| -- |
6641 |
