Design of CMOS phase-locked loops : from circuit level to architecture level Behzad Razavi
Material type: TextPublication details: Cambridge : Cambridge University Press, 2020.Description: xvi, 492 pages 24CMISBN:- 9781108494540
- 621.381 RAZ
Item type | Current library | Collection | Call number | Status | Date due | Barcode |
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Books | IIITDM Kurnool General Stacks | Non-fiction | 621.381 RAZ (Browse shelf(Opens below)) | Available | 0003180 | |
Books | IIITDM Kurnool General Stacks | Non-fiction | 621.381 RAZ (Browse shelf(Opens below)) | Available | 0003181 |
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621.381 PLA V.1 Encyclopedia of Electronic Components | 621.381 PLA V.2 Encyclopedia of Electronic Components | 621.381 PLA V.3 Encyclopedia of Electronic Components | 621.381 RAZ Design of CMOS phase-locked loops : | 621.381 RAZ Design of CMOS phase-locked loops : | 621.381 SAT Handbook of nanophysics. Nanoelectronics and nanophotonics | 621.381 SCH Practical electronics for inventors / |
1. Oscillator fundamentals; 2. Introduction to jitter and phase noise; 3. Design of inverter-based ring oscillators; 4. Design of differential and multiphase ring oscillators; 5. LC oscillator design; 6. Advanced oscillator concepts; 7. Basic PLL architectures;rs 8. PLL design considerations; 9. PLL design study; 10. Digital phase-locked loops; 11. Delay-locked loops; 12. RF synthesis; 13. Clock and data recovery fundamentals; 14. Advanced clock and data recovery principles; 15. Frequency divide
Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design
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