Digital System Test and Testable Design: (Record no. 2346)
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000 -LEADER | |
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fixed length control field | 01629nam a22001577a 4500 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20240730100008.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 240730b |||||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9781489979278 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.381 |
Item number | NAV |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Navabi, Zainalabedin |
245 ## - TITLE STATEMENT | |
Title | Digital System Test and Testable Design: |
Remainder of title | Using HDL Models and Architectures |
Statement of responsibility, etc. | Zainalabedin Navabi |
260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
Place of publication, distribution, etc. | USA |
Name of publisher, distributor, etc. | Springer |
Date of publication, distribution, etc. | 2011 |
300 ## - PHYSICAL DESCRIPTION | |
Page number | 435p |
520 ## - SUMMARY, ETC. | |
Summary, etc. | This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | Dewey Decimal Classification |
Koha item type | Books |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6892 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6893 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6894 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6895 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6896 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6897 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6898 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6899 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6900 |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
-- | 6901 |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Inventory number | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Currency | Koha item type | Collection code |
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Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006013 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006014 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006015 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006016 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006017 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006018 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006019 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006020 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | IIITDM Kurnool | IIITDM Kurnool | ELECTRONICS COMMUNICATION ENGINEERING | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006021 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Books | ||||||
Dewey Decimal Classification | Not For Loan | IIITDM Kurnool | IIITDM Kurnool | Reference | 30.07.2024 | Narendra Publishing House | 79.99 | NPH/24-25/IN-00122 DT 22/7/2024 | 621.381 NAV | 0006022 | 30.07.2024 | 79.99 | 30.07.2024 | EURO | Reference | Reference |